module spi_top (
    input       clk         ,
    input       rst_n       ,
    input [2:0] key_down    ,
    output[23:0]out_data    ,
    output      data_vld    ,
    //---------<rx>------------------------------------------------- 
    input [7:0] rx_data     ,
    input       rx_vld      ,
    //---------<spi>------------------------------------------------- 
    output      sclk        ,
    output      mosi        ,
    output      cs_n        ,
    input       miso        
);

wire    [7:0]   rd_data;
wire            trans_done;
wire            rw_flag;
wire    [7:0]   wr_data;

spi_ctrl    inst_spi_ctrl(
    .clk         (clk         ),
    .rst_n       (rst_n       ),
    .key_down    (key_down    ),
    .rd_data     (rd_data     ),
    .trans_done  (trans_done  ),
    .rx_data     (rx_data     ),
    .rx_vld      (rx_vld      ),
    .rw_flag     (rw_flag     ),
    .out_data    (out_data    ),
    .data_vld    (data_vld    ),
    .wr_data     (wr_data     )
); 

spi_driver  inst_spi_driver(
    .clk       (clk       ),
    .rst_n     (rst_n     ),
    .rw_flag   (rw_flag   ),
    .wr_data   (wr_data   ),
    .rd_data   (rd_data   ),
    .trans_done(trans_done),
    .sclk      (sclk      ),
    .mosi      (mosi      ),
    .cs_n      (cs_n      ),
    .miso      (miso      )
);
endmodule